for further information contact your local stmicroelectronics sales office. october 2014 docid027081 rev 2 1/10 STA1095 accordo2 dual core processor for car radio and display audio applications data brief features core and infrastructure ? arm? cortex?-r4 mcu ? embedded sram ? sdram controller ? serial qio nor interface executable in place ? parallel nand/nor controller audio subsystem ? sound processing dsps ? 1x 6 stereo channels hardware sample rate converter ? 6x audio dac ? digital audio interfaces (i2s/ multichannel ports) ? 1x single ended stereo adc with internal switching logic ? 1x differential mono adc with internal switching logic media interfaces ? secure-digital multimedia memory card interfaces ? usb 2.0 interfaces ? spdif with cdrom block decoder support display subsystem ? tft controller ? touch screen controller ? video input port ? graphics processing unit embedded secure can subsystem ? dedicated arm cortex-m3 core ? isolated embedded memory ? can ports ? secured nor interface i/o interfaces ? general purpose adcs ? i2c multi-master/slave interfaces ? uart controllers ? synchronous serial ports (ssp/spi) ? gpios ? jtag operating conditions ? vdd: 1.14v - 1.26v ? vddio: 3.3v 10% ? vddioon: 3.3v 10%, ? ambient temperature range: -40 / +85c / ) % * $ [ [ p p s l w f k * $ 3 * 3 6 table 1. device summary order code package packing STA1095 lfbga361 (16x16x1.7, 0.8mm pitch) tray www.st.com
contents STA1095 2/10 docid027081 rev 2 contents 1 description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 system description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.1 processor mcu . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.2 memory controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.2.1 embedded memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.2.2 sdram controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.2.3 sqi executable in place . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.2.4 parallel memory interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.3 usb . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.4 sound subsystem . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.4.1 audio interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2.4.2 routing and sample rate converters . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2.4.3 sound dsp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2.5 sd/mmc . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2.6 dma . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2.7 secure can subsystem . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.8 general purpose adc . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.9 gpios . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.10 generic interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.10.1 uarts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.10.2 i 2 cs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.10.3 ssp/spi ports supporting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.11 video input port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.12 smart graphics accelerator (gpu) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.13 display controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.14 touch screen controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 3 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 4 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
docid027081 rev 2 3/10 STA1095 description 10 1 description STA1095 is a device that provides a cost effective microprocessor solution for modern automotive car radio systems, with an embedded powerful digital sound processing subsystem, as well as a mips efficient arm cortex-r4 processor. in addition, an arm cortex-m3 controller is dedicated for real-time can / vehicle interface processing. in terms of peripherals, STA1095 comes with an exhaustive set of common interfaces (uart/i2s/i2c/usb/mmc) which make the device optimal for implementing a feature rich system as well as a cost effective solution. the solution is bundled with a complete software package, which allows a very fast system implementation. STA1095 manages the entire audio chain from analog or digital inputs to analog or digital outputs, including digital audio media decoding, sample rate conversion among various sources, intelligent routing and audio effects / dsp post processing. with its flexible memory configuration, it allows implementing from very low cost systems based on real time os, scaling up to demanding applications based on linux os. figure 1. block diagram 6 ' 5 $ 0 1 $ 1 ' 6 ' 6 ' , 2 $ ' & 9 l g h r g h f $ ' 9 $ ' & ' $ & 9 h k l f o h , ) s u r f h v v r u 8 6 % . h \ l 3 2 ' 6 p d u w s k r q h $ x [ , 1 0 l f , 1 & ' p r g x o h $ 0 ) 0 w x q h u $ x g l r g h f s o d \ e d f n l 3 2 ' f r q w u r o o l e u d u \ ' 6 3 v r x q g h i i h f w v p h g l d o l e u d u \ % 7 v w d f n v ( & 1 5 $ f f r u g r 6 7 $ 6 3 ' , ) , 6 , & 8 6 % + 6 g x d o u r o h l $ 3 u h d g \ , 6 7 6 & 5 * % 8 $ 5 7 / & ' & $ 1 & d p h u d ) u r q w s d q h o % o x h w r r w k + & , 5 ) f k d q q h o v d p s o l i l h u * $ 3 * 3 6
system description STA1095 4/10 docid027081 rev 2 2 system description 2.1 processor mcu STA1095 processing capability relies on an arm cortex-r4. the mcu has instruction cache and data cache, as well as tcm memory dedicated respectively to instructions and data for high throughput and low latency tasks. 2.2 memory controller 2.2.1 embedded memory STA1095 embeds sram memory, which can be used for data or code storage. embedded memory can be used in conjunction with executable in place nor devices to implement cost effective solutions. the whole embedded memory is also cacheable and can be accessed by dma. 2.2.2 sdram controller sdram controller supports sdram jedec interface 16 or 32 bits wide, which allows interfacing to automotive sdram memory devices to handle high footprint applications. such memory is cacheable, and can be accessed by dma. 2.2.3 sqi executable in place the sqio controller allows interfacing serial quad i/o flash memories. 2.2.4 parallel memory interface fsmc static memory controller, provides a generic parallel interface suitable to connect to nor devices as well as sram and nand devices. this peripheral allows execution in- place from nor/srams, as well as dma accesses. nor memory space can be partitioned so to reserve a portion of the parallel nor device to the secure can subsystem. 2.3 usb STA1095 has one usb hs interfaces with embedded phy, allowing to efficiently connect to mass storage devices, as well as portable devices (phones, pads). along with usb connectivity, STA1095 fully supports usb charger specification. 2.4 sound subsystem STA1095 implements a sound subsystem which allows to efficiently handle sound processing tasks, such as spatialization and equalizer, without loading the main cpu with interrupt intensive tasks.
docid027081 rev 2 5/10 STA1095 system description 10 2.4.1 audio interfaces a complete set of audio interfaces is provided, in order to simplify integration with amplifiers, and input sources. each interface can be routed to the sound subsystem. a complete list of audio interfaces is provided below: ? audio adc ? shared between aux line and tuner line ? adc inputs are single ended 3.3 v ? voice adc ? shared among voice and tel-in lines with embedded multiplexer ? both mic and tel-in lines are differential inputs ? stereo dac ? multiple i2s in ? multiple i2s out ? spdif in for cd/cdrom input with hardware block decoder for cdrom error correction. 2.4.2 routing and sample rate converters each audio interface can be routed in both directions (in/out) through hardware sample rate converters, which allow normalizing the sampling rate to the sound processing engine. the audio routing infrastructure is designed to deliver high quality sample rate conversion on multiple channels, allowing simultaneous audio streams, such as bluetooth? hands free and audio media playback, to be handled without cpu load. 2.4.3 sound dsp STA1095 is equipped with multiple dsps dedicated to sound processing, fully integrated with the sound subsystem with a specific isochronous bus. dsp is provided with an integrated sound processing library implementing effects like spatialization, balancing and equalizer, etc.. 2.5 sd/mmc STA1095 is equipped with sdmmc controllers, which allow interfacing to either mass storage devices, or to wi-fi modules. 2.6 dma dma is designed to efficiently perform memory to memory, and memory to peripherals transfers, offloading such tasks from the processor, thus reducing interrupt handling load. dma provides independent channels which can be dynamically assigned to different data- path. complex scatter/gather transfers can be implemented by programming specific dma command linked lists.
system description STA1095 6/10 docid027081 rev 2 2.7 secure can subsystem STA1095 allows isolating critical code from main application by implementing a dedicated subsystem based on arm cortex-m3, along with: 256kb dedicated embedded sram ? dedicated embedded sram ? can controller ? dedicated gpios in order to guarantee security of can network, it can be completely isolated from the rest of the system, in such a way that no application running on cortex-r4 can access by any mean to can specific resources. the secure sub-system communicates with the application running on cortex-r4 using a hardware mailbox interrupt based mechanism. 2.8 general purpose adc STA1095 has general purpose adcs with a resolution of 10-bits. 2.9 gpios STA1095 has gpios which can be independently configured either as input or output. in order to make the system flexible, these ios are multiplexed on pins with other peripherals. 2.10 generic interfaces 2.10.1 uarts ? programmable baud rates up to3mbps ? hardware flow control ? dma capable. 2.10.2 i 2 cs ? master/slave modes in multi-master environment ? multiple baud rates supported: 100/400/1000/3400 kbits/s ? dma capable 2.10.3 ssp/spi ports supporting ? motorola spi-compatible interface ? texas instrument synchronous serial interface ? national semiconductor microwire? interface ? unidirectional interface ? dma capable
docid027081 rev 2 7/10 STA1095 system description 10 2.11 video input port the video input port (vip) allows to grab images from external devices, supporting parallel interface. vip supports both interlaced and progressive modes. the vip is synchronized with display controller to prevent from tearing effects, and is used in conjunction with gpu to implement on the fly color conversion and bilinear interpolated re-scaling. 2.12 smart graphics accelerator (gpu) the aim of the smart graphic accelerator (sga) is to provide an efficient 2d and 3d primitive drawing tool that breaks down the mips and power consumption concerns of pixel processing. it supports: ? control and synchronization features ? 2d-graphics features ? video overlay features ? 3d graphics features 2.13 display controller the main features of the lcd controller are: ? supports single and dual panel monochrome stn displays with 4 or 8 bits interfaces ? supports single and dual panel color stn displays with 8 bits interfaces ? supports tft color displays ? supports ad-tft and hr-tft color displays ? programmable timing for different display panels 2.14 touch screen controller 4-wire touch screen controller and a 8bit - input adc. the touch screen controller is enhanced with a movement tracking algorithm.
package information STA1095 8/10 docid027081 rev 2 3 package information in order to meet environmental requirements, st offers these devices in different grades of ecopack ? packages, depending on their level of environmental compliance. ecopack ? specifications, grade definitions and product status are available at: www.st.com . ecopack ? is an st trademark. figure 2. lfbga361 mechanical data and package dimensions * $ 3 * 3 6 i i i h h h g g g = h ( ( ' ' e $ $ $ $ ' , 0 0 , 1 7 < 3 p p 0 $ ; 0 , 1 7 < 3 l q f k 0 $ ; 0 ( & + $ 1 , & $ / ' $ 7 $ 2 8 7 / , 1 ( $ 1 ' % r g \ [ [ p p / r z s u r i l o h ) l q h 3 l w f k % d o o * u l g $ u u d \ / ) % * $ &
docid027081 rev 2 9/10 STA1095 revision history 10 4 revision history table 2. document revision history date revision changes 23-oct-2014 1 initial release. 27-oct-2014 2 modified the title in cover page.
STA1095 10/10 docid027081 rev 2 important notice ? please read carefully stmicroelectronics nv and its subsidiaries (?st?) reserve the right to make changes, corrections, enhancements, modifications, and improvements to st products and/or to this document at any time without notice. purchasers should obtain the latest relevant in formation on st products before placing orders. st products are sold pursuant to st?s terms and conditions of sale in place at the time of o rder acknowledgement. purchasers are solely responsible for the choice, selection, and use of st products and st assumes no liability for application assistance or the design of purchasers? products. no license, express or implied, to any intellectual property right is granted by st herein. resale of st products with provisions different from the information set forth herein shall void any warranty granted by st for such product. st and the st logo are trademarks of st. all other product or service names are the property of their respective owners. information in this document supersedes and replaces information previously supplied in any prior versions of this document. ? 2014 stmicroelectronics ? all rights reserved
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